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2010 Microchip Technology Inc.

DS70102K-page 63

dsPIC30F Flash Programming Specification

APPENDIX C: REVISION HISTORY

Note:

Revision histories were not recorded for

revisions A through H. The previous

revision (J), was published in August

2007.

Revision K (November 2010)

This version of the document includes the following

updates:

Added Note three to Section 5.2 “Entering

Enhanced ICSP Mode”

Updated the first paragraph of Section 10.0

“Device ID”

Updated Table 10-1: Device IDs

Removed the VARIANT bit and updated the bit

definition for the DEVID register in Table 10-2:

dsPIC30F Device ID Registers

Removed the VARIANT bit and updated the bit

field definition and description for the DEVID

Updated Note 3 in Section 11.3 “Entering ICSP

Mode”

Updated Step 11 in Table 11-4: Serial Instruction

Execution for BUlk Erasing Program Memory

(Only in Normal-voltage Systems)

Updated Steps 5, 12 and 19 in Table 11-5: Serial

Instruction Execution for Erasing Program

Memory (Either in Low-voltage or Normal-voltage

Systems)

Updated Steps 5, 6 and 8 in Table 11-7: Serial

Instruction Execution for Writing Configuration

Registers

Updated Steps 6 and 8 in Table 11-8: Serial

Instruction Execution for Writing Code Memory

Updated Steps 6 and 8 in Table 11-9: Serial

Instruction Execution for Writing Data EEPROM

Updated Entering ICSP Mode (see Figure 11-4)

Updated Steps 4 and 11 in Table 12-1:

Programming the Programming Executive

Renamed parameters: P12 to P12a and P13 to

P13a, and added parameters P12b and P13b in

Table 13-1: AC/DC Characteristics

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